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Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors

From:  Borislav Petkov <bp-AT-alien8.de>
To:  Aravind Gopalakrishnan <aravind.gopalakrishnan-AT-amd.com>
Subject:  Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors
Date:  Wed, 24 Feb 2016 12:28:47 +0100
Message-ID:  <20160224112846.GA3888@pd.tnic>
Cc:  tony.luck-AT-intel.com, hpa-AT-zytor.com, mingo-AT-redhat.com, tglx-AT-linutronix.de, dougthompson-AT-xmission.com, mchehab-AT-osg.samsung.com, x86-AT-kernel.org, linux-edac-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, ashok.raj-AT-intel.com, gong.chen-AT-linux.intel.com, len.brown-AT-intel.com, peterz-AT-infradead.org, ak-AT-linux.intel.com, alexander.shishkin-AT-linux.intel.com
Archive‑link:  Article

On Tue, Feb 23, 2016 at 04:50:37PM -0600, Aravind Gopalakrishnan wrote:
> Sorry about that. Looks like this pair is not defined in spelling.txt. So,
> might be worth adding there as well?

Oh geez, we have a spelling.txt! I think we can declare the kernel as
done and go do something else with our lives...

> It's the block for programming FUSE registers.

Oh, that's what it is.

So maybe "fuses block" or "fuses" or ... just the capitalized "FUSE" is
kinda misleading.

> How about "Unable to gather IP block that threw the error. Therefore cannot
> decode errors further.\n"

Or simply "Invalid IP block specified, error information is unreliable."
and still continue decoding. It might still be recognizable from the
signature, methinks.

> If for some reason the CPUID bit is not set, then we should not assume the
> processor supports the features right?

Is that even remotely possible? If yes, then we should keep the warning,
otherwise it is useless.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.




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