| From: |
| Paul Burton <paul.burton@imgtec.com> |
| To: |
| <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org> |
| Subject: |
| [PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading) |
| Date: |
| Wed, 3 Feb 2016 03:15:20 +0000 |
| Message-ID: |
| <1454469335-14778-1-git-send-email-paul.burton@imgtec.com> |
| Cc: |
| Paul Burton <paul.burton@imgtec.com>, "Maciej W. Rozycki" <macro@imgtec.com>, Joshua Kinard <kumba@gentoo.org>, Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>, Jason Cooper <jason@lakedaemon.net>, "Ezequiel Garcia" <ezequiel.garcia@imgtec.com>, Rusty Russell <rusty@rustcorp.com.au>, "Steven J. Hill" <Steven.Hill@imgtec.com>, Andrew Bresticker <abrestic@chromium.org>, "Maciej W. Rozycki" <macro@linux-mips.org>, "Thomas Gleixner" <tglx@linutronix.de>, Bjorn Helgaas <bhelgaas@google.com>, "Markos Chandras" <markos.chandras@imgtec.com>, Petri Gynther <pgynther@google.com>, Alex Smith <alex.smith@imgtec.com>, Niklas Cassel <niklas.cassel@axis.com>, Matt Redfearn <matt.redfearn@imgtec.com>, <linux-kernel@vger.kernel.org>, James Hogan <james.hogan@img |
| Archive‑link: | |
Article |
This series introduces support for the multi-core & multi-threading
capabilities of the I6400. That is, it introduces support for MIPSr6
Virtual Processors & enables CPS SMP for MIPSr6.
Based atop v4.5-rc2.
Markos Chandras (3):
MIPS: traps: Make sure secondary cores have a sane ebase register
MIPS: pm-cps: Avoid offset overflow on MIPSr6
MIPS: CPC: Add start, stop and running CM3 CPC registers
Paul Burton (12):
MIPS: Detect MIPSr6 Virtual Processor support
MIPS: CM: Add CM GCR_BEV_BASE accessors
MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
irqchip: mips-gic: Use HW IDs for VPE_OTHER_ADDR
irqchip: mips-gic: Provide VP ID accessor
MIPS: smp-cps: Ensure our VP ident calculation is correct
MIPS: smp-cps: Pull cache init into a function
MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes
MIPS: smp-cps: Skip core setup if coherent
MIPS: smp-cps: Support MIPSr6 Virtual Processors
MIPS: smp-cps: Add nothreads kernel parameter
MIPS: smp-cps: Stop printing EJTAG exceptions to UART
arch/mips/Kconfig | 2 +-
arch/mips/include/asm/cpu-features.h | 4 +
arch/mips/include/asm/cpu-info.h | 4 +-
arch/mips/include/asm/cpu.h | 1 +
arch/mips/include/asm/mips-cm.h | 6 +-
arch/mips/include/asm/mips-cpc.h | 3 +
arch/mips/include/asm/mipsregs.h | 1 +
arch/mips/include/asm/smp-cps.h | 2 +-
arch/mips/kernel/cps-vec.S | 296 ++++++++++++++++++++++-------------
arch/mips/kernel/cpu-probe.c | 2 +
arch/mips/kernel/pm-cps.c | 15 +-
arch/mips/kernel/smp-cps.c | 64 +++++++-
arch/mips/kernel/traps.c | 7 +
drivers/irqchip/irq-mips-gic.c | 22 ++-
include/linux/irqchip/mips-gic.h | 17 ++
15 files changed, 320 insertions(+), 126 deletions(-)
--
2.7.0
