User: Password:
|
|
Subscribe / Log in / New account

Hardware pain points for memory management

Hardware pain points for memory management

Posted Mar 27, 2014 23:18 UTC (Thu) by etienne (guest, #25256)
Parent article: Hardware pain points for memory management

Would tagging the TLB entries with special kernel tag and either single or multiple user space tags be beneficial, so that a switch to kernel space simply disable TLB user tag with a single instruction, and returning to same user mode re-enable user TLBs?
There seems to be such a thing on ARM MMU.
It is quite difficult to measure the time lost by invalidating and reloading TLB...


(Log in to post comments)


Copyright © 2017, Eklektix, Inc.
Comments and public postings are copyrighted by their creators.
Linux is a registered trademark of Linus Torvalds