does anyone seriously think that this is what the bare hardware understands? NO. But this is still the API to the peripheral.
Unless there is some other way to interact with this GPU, this is the API for the GPU. You may not like it, or may want to have a lower-level API, but that's not relavent to what the API is.
let's look at storage.
you can have a very, very low-level API (MFM/RLL era)
step this many cylinders in this direction from where you are, wait this long from the 'start of track' marker and start reading/writing data
you can have a low-level API (IDE/ATA/SCSI era)
write this chunk of data to this disk block, potentially with reordering of actions
you can have a medium-level API (filesystems)
you say you want to create a new file and write to it, the filesystem creates directory entries, decides where the file will actually live, etc
If a device plugs into your network and implements the NFS protocol, it doesn't make your OS any less 'open' to use this device, even if you don't have access to the software running on this device, or if said software in in ROM
and you can have a high-level API
object based storage, think web based storage (although people keep talking about having this at the drive level as well), you tell the storage what blob you are dealing with and you read/write the entire blob
note that the way the storage is attached doesn't have that much to do with the API level.
you have experimental drives that you talk object based APIs via a SCSI buss, and you have SCSI level APIs that you talk to over an ethernet bus.
It doesn't matter that most GPU vendors are shipping devices where the API is at the same level as the old MFM/RLL hard drives. Having this GPU operate at a higher level (ATA/SCSI equivalent) may be a dead end, or it may be the wave of the future, people will disagree and only time will tell.
There can be very real advantages to having higher level APIs to devices
But in any case, API for this device really is the high-level interface. you can prove this by talking to it.
> no one sane puts a compiler in hardware
what about ACPI? I thought that handling those calls required a compiler in the BIOS
you may argue that CPI isn't sane, but sanity (expecially by the terms prior to a new thing being released) is a poor indicator for how successful something is going to be.
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