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The problem with prefetch

The problem with prefetch

Posted May 25, 2011 13:49 UTC (Wed) by nye (guest, #51576)
In reply to: The problem with prefetch by Cyberax
Parent article: The problem with prefetch

>No. SRAM uses 6 transistors, and in idle mode continuously seeps energy. That's OK if you have a small cache buffer but when you have gigabytes of SRAM it adds up very quickly.

> DRAM uses capacitors and only needs to be refreshed from time to time.

All of the resources I can find describing SRAM state that the power used continuously while idle is trivial compared to the power needed to constantly refresh DRAM, and hence it's only during heavy utilisation that its power consumption can get *up to* that of DRAM.

>Our embedded guys tell me that SRAM also is quite power-hungry during reads and writes, so high-frequency SRAMs consume significantly more power than DRAM. Sometimes very significantly more power

I'm sure what you're saying is true in your case, but how do you reconcile that with the fact that every other comparison between the two disagrees?

The only idea I can come up with is that you're comparing SRAM running *much faster* than DRAM so it's an apples-to-oranges comparison(?)


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