One other use for volatile is when communicating with interrupt/NMI handlers running on the same CPU. In this case, all the accesses are on the same CPU, so CPU reordering is irrelevant -- CPUs see their own accesses in order. The only requirement is that the compiler avoid optimizations that re-order the code.
Note that this applies only to hardware interrupts or NMIs -- this technique does not necessarily work for "interrupt handlers" that are passed off to threads.
So this is a specialized technique (especially in -rt), but an entirely valid one.
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