The TSC can also be read quickly (it is just a CPU register, after all) ...
This theory has never been correct for x86 processors. The minimum cost for rdtsc was 9 cycles in a PentiumMMX-166MHz. On a Pentium4Xeon-3.0GHz it takes 97 cycles. The conclusion? The hardware reads TSC serially one bit at a time, or one byte at a time on old processors.
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