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Reconvergent fanout

Reconvergent fanout

Posted Nov 2, 2006 16:19 UTC (Thu) by jreiser (subscriber, #11027)
In reply to: Buried in warnings by JoeBuck
Parent article: Buried in warnings

The situation JoeBuck describes is a kind of "re-convergent fanout" which the people who do static timing analysis for digital circuit design figured out how to handle 20 years ago.


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Reconvergent fanout

Posted Nov 3, 2006 2:59 UTC (Fri) by pimlott (guest, #1535) [Link] (1 responses)

A few more minutes of writing might have made that post a whole lot more educational for the rest of us. :-)

Reconvergent fanout

Posted Nov 3, 2006 19:40 UTC (Fri) by bronson (subscriber, #4806) [Link]

I don't think so... Reconvergent fanout is similar to this problem much like a banana is similar to a school bus because they are yellow.

Reconvergent fanout is a way to make VLSI static timing analysis less pessimistic. Each time a signal passes thorugh a node, a bit of uncertainty is added to the timing delay. However, if two (ore more) signals pass through the same node, follow separate paths, and then return to the same point, you can remove a fair amount of uncertainty because you know that one point they shared a common path. Whatever the uncertainty was, it was identical for both.

So, yes, both techniques trace signals through a system. Beyond that, though, it seems to me that they're totally different. I hope somebody will clue me in if I'm missing something; it's been many years since I was a VLSI hack.


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