I just hope bus power management was carefully considered in this design - especially, as one poster mentioned, suspend and resume. It would be EXTREMELY frustrating to see a new PCI device driver API arrive without well thought out interfaces for consistent power managment, given that a new API is the perfect opportunity to introduce strong requirements on those issues.
Given that everything from supercomputers to smartphones cares a lot about power managment these days, it'd be very silly not to plan for it.
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