|From:||Paul Mackerras <paulus-AT-samba.org>|
|Subject:||Opinion on ordering of writel vs. stores to RAM|
|Date:||Sat, 9 Sep 2006 12:03:29 +1000|
|Cc:||linux-kernel-AT-vger.kernel.org, benh-AT-kernel.crashing.org, akpm-AT-osdl.org, segher-AT-kernel.crashing.org, davem-AT-davemloft.net|
Linus, An issue has come up in the tg3 ethernet driver, where we are seeing data corruption on ppc64 machines that is attributable to a lack of ordering between writes to normal RAM and writes to an MMIO register. Basically the driver does writes to RAM and then a writel to an MMIO register to trigger DMA, and occasionally the device then reads old values from memory. Do you have an opinion about whether the MMIO write in writel() should be ordered with respect to preceding writes to normal memory? Currently we have a sync instruction after the store in writel() but not one before. The sync after is to keep the writel inside spinlocked regions and to ensure that the store is ordered with respect to the load in readl() and friends. Paul.
Copyright © 2006, Eklektix, Inc.
Comments and public postings are copyrighted by their creators.
Linux is a registered trademark of Linus Torvalds