Does this very theoretical exploit affect multicore systems too? I'm not sure I have this right, but I think they sharing cache too. Or is the (still very theorietical) exploit dependent on the feature that the hostile thread and the cryptographic one do not run at the same time?
In any case, I have the answer:
<TIC>This is the perfect exploit to close with security thorugh obscurity. We have to lessen the risque that the two processes happen to be in the same processor cache at the same time. This is best (depending on wether you share my definition of 'best') done by getting an 8-way SMP system, preferably dualcore. (Well, at least _I_ would prefer that, wouldn't you?) Thus the chance would be slim, at best, that the two processes would schedule to the same processor at the same time. (Now, all I need is to persuade my wife that this is necessary in the name of security.)</TIC>
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