| From: |
| Taniya Das <taniya.das-AT-oss.qualcomm.com> |
| To: |
| Bjorn Andersson <andersson-AT-kernel.org>, Michael Turquette <mturquette-AT-baylibre.com>, Stephen Boyd <sboyd-AT-kernel.org>, Brian Masney <bmasney-AT-redhat.com>, Shawn Guo <shengchao.guo-AT-oss.qualcomm.com>, Bartosz Golaszewski <bartosz.golaszewski-AT-oss.qualcomm.com>, Rob Herring <robh-AT-kernel.org>, Krzysztof Kozlowski <krzk+dt-AT-kernel.org>, Conor Dooley <conor+dt-AT-kernel.org>, Neil Armstrong <neil.armstrong-AT-linaro.org>, Konrad Dybcio <konradybcio-AT-kernel.org> |
| Subject: |
| [PATCH 0/6] clk: qcom: Add Nord multimedia clock controller support |
| Date: |
| Tue, 23 Jun 2026 16:24:03 +0530 |
| Message-ID: |
| <20260623-nords_mm_v1-v1-0-860c84539804@oss.qualcomm.com> |
| Cc: |
| Ajit Pandey <ajit.pandey-AT-oss.qualcomm.com>, Imran Shaik <imran.shaik-AT-oss.qualcomm.com>, Jagadeesh Kona <jagadeesh.kona-AT-oss.qualcomm.com>, linux-arm-msm-AT-vger.kernel.org, linux-clk-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, Taniya Das <taniya.das-AT-oss.qualcomm.com> |
| Archive-link: |
| Article |
This series adds clock controller support for the multimedia subsystems
on the Qualcomm Nord SoC platform, along with two fixes for always-on
clocks that were incorrectly exposed as controllable branches.
The Nord platform is a multi-cluster SoC that includes dedicated clock
controllers for the display and graphics subsystems. This series adds:
- DT bindings and driver support for the two display clock controller
instances (DISPCC_0 and DISPCC_1).
- DT bindings and driver support for the two GPU clock controller
instances (GPUCC and GPU2CC).
- A fix for the GCC-Nord driver to mark PCIe link AHB and XO clocks
as critical CBCRs instead of gatable clk_branch instances.
- A fix for the NEGCC-Nord driver to mark the GPU2 CFG clock as a
critical CBCR instead of a controllable clk_branch.
The two fix patches carry Fixes: tags pointing to the original Nord GCC
commit and are candidates for stable backport.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
Taniya Das (6):
clk: qcom: gcc-nord: mark PCIe link clocks as critical
clk: qcom: negcc-nord: keep GPU2 CFG clock enabled via critical CBCR
dt-bindings: clock: qcom: Document Nord display clock controller
clk: qcom: Add Nord display clock controller support
dt-bindings: clock: qcom: Document Nord GPU clock controllers
clk: qcom: gpucc: Add Nord graphics clock controller support
.../bindings/clock/qcom,sm8450-gpucc.yaml | 3 +
.../bindings/clock/qcom,sm8550-dispcc.yaml | 3 +
drivers/clk/qcom/Kconfig | 22 +
drivers/clk/qcom/Makefile | 2 +
drivers/clk/qcom/dispcc0-nord.c | 2006 ++++++++++++++++++++
drivers/clk/qcom/dispcc1-nord.c | 2006 ++++++++++++++++++++
drivers/clk/qcom/gcc-nord.c | 37 +-
drivers/clk/qcom/gpu2cc-nord.c | 546 ++++++
drivers/clk/qcom/gpucc-nord.c | 593 ++++++
drivers/clk/qcom/negcc-nord.c | 22 +-
include/dt-bindings/clock/qcom,nord-dispcc.h | 115 ++
include/dt-bindings/clock/qcom,nord-gpucc.h | 51 +
12 files changed, 5360 insertions(+), 46 deletions(-)
---
base-commit: 3ce97bd3c4f18608335e709c24d6a40e7036cab8
change-id: 20260620-nords_mm_v1-9b7dd4f92d6d
Best regards,
--
Taniya Das <taniya.das@oss.qualcomm.com>
