|
|
Log in / Subscribe / Register

dmaengine: dw-edma: Prepare for PCI EP DMA (part 1/3)

From:  Koichiro Den <den-AT-valinux.co.jp>
To:  Vinod Koul <vkoul-AT-kernel.org>, Frank Li <Frank.Li-AT-kernel.org>, Manivannan Sadhasivam <mani-AT-kernel.org>
Subject:  [PATCH v3 00/13] dmaengine: dw-edma: Prepare for PCI EP DMA (part 1/3)
Date:  Sun, 21 Jun 2026 02:00:27 +0900
Message-ID:  <20260620170040.3756043-1-den@valinux.co.jp>
Cc:  Marek Vasut <marek.vasut+renesas-AT-mailbox.org>, Yoshihiro Shimoda <yoshihiro.shimoda.uh-AT-renesas.com>, dmaengine-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org
Archive-link:  Article

Hi,

This is v3, part 1 of three series for PCI endpoint DMA.

The three series are:

  * part 1: dmaengine: dw-edma: Prepare for PCI EP DMA
  * part 2: PCI: endpoint: Expose endpoint DMA resources
  * part 3: PCI: endpoint: Add PCI DMA endpoint function

Most v3 changes address review comments from Frank and Sashiko. v3 also
extends the DesignWare DMA groundwork for HDMA native.

This series is (re-)based on linux-next next-20260619, where the dmaengine
and PCI endpoint changes needed by the full three-part series are both
naturally available. Parts 2 and 3 depend on this series.


Scope
=====

This series prepares dw-edma and dw-edma-pcie for endpoint-local DMA
channels that are delegated to a PCI host. It does not add the endpoint
metadata format, DesignWare endpoint resource exposure, or the endpoint
function driver; those are added by parts 2 and 3.

This part is the DesignWare dmaengine backend work. The endpoint resource
and endpoint function pieces in parts 2 and 3 keep the generic PCI endpoint
interfaces separate from the DesignWare implementation.

In summary, this series:

  * adds per-channel interrupt routing so a channel can report completion
    either to the local endpoint side or to the remote host side,
  * adds quiesce operations for the resources represented by a dw-edma
    instance,
  * adds helpers to reserve exact DesignWare hardware channels and hand
    their interrupt ownership to the remote side,
  * adds partial channel ownership mode for dw-edma instances that share a
    controller with another OS instance, and
  * prepares dw-edma-pcie to describe device-specific DMA layouts through
    match data.

---
Changelog
=========

Changes in v3:
  - Replace the public dw-edma hardware-channel filter API with delegated
    channel request/release helpers, keeping the DMAengine filter private
    to dw-edma. (Frank)
  - Rework IRQ routing so local routing is the zero value, existing
    dw-edma-pcie instances stay remote-routed, and delegated endpoint-local
    channels are handed to the remote side explicitly. (Frank/Sashiko)
  - Add HDMA native interrupt routing and allow channel-granular partial
    ownership for HDMA native.
  - Add quiesce operations and use them for delegated-channel reclaim and
    partial-owned remove paths.
  - Reintroduce the IRQ data initialization fix because partial-owned probe
    skips the core_off() reset that previously made the early-IRQ window
    unlikely.
  - Adjust dw-edma-pcie match-data preparation for the CPM6 entry present
    in the new base, and reject dynamic PCI IDs without match data.

Changes in v2:
  - Move non-LL state and platform ops into match data. (Frank)
  - Use a named .driver_data initializer for the Xilinx MDB ID entry and
    fix the vsec_data rename patch title. (Frank)
  - Replace the dma_get_slave_channel() export with a dw-edma channel
    filter for dma_request_channel(). (Sashiko)
  - Rework the IRQ-routing config as dw_edma_irq_config, keep HDMA native
    int config separate, and reject remote IRQ mode on local instances.
    (Sashiko)
  - Report IRQ_HANDLED only for status that was actually serviced and drop
    the lockless free_chan_resources() reset. (Sashiko)
  - Tighten partial ownership: reject unsupported map formats early and
    require direction-wide ownership for supported shared-register
    layouts. (Sashiko)

v2: https://lore.kernel.org/dmaengine/20260525062420.3315904-...
v1: https://lore.kernel.org/dmaengine/20260521063115.2842238-...


Best regards,
Koichiro


Koichiro Den (13):
  dmaengine: dw-edma: Add per-channel interrupt routing control
  dmaengine: dw-edma: Add core quiesce operations
  dmaengine: dw-edma: Add delegated channel request helpers
  dmaengine: dw-edma: Initialize IRQ data before requesting IRQs
  dmaengine: dw-edma: Add partial channel ownership mode
  dmaengine: dw-edma-pcie: Track non-LL mode in DMA data
  dmaengine: dw-edma-pcie: Add capability match data
  dmaengine: dw-edma-pcie: Rename vsec_data to dma_data
  dmaengine: dw-edma-pcie: Add platform ops to match data
  dmaengine: dw-edma-pcie: Add register offset match flag
  dmaengine: dw-edma-pcie: Factor out descriptor block address lookup
  dmaengine: dw-edma-pcie: Handle optional data blocks
  dmaengine: dw-edma-pcie: Add chip flags to match data

 drivers/dma/dw-edma/dw-edma-core.c    | 150 +++++++++++++--
 drivers/dma/dw-edma/dw-edma-core.h    |  27 +++
 drivers/dma/dw-edma/dw-edma-pcie.c    | 253 +++++++++++++++++---------
 drivers/dma/dw-edma/dw-edma-v0-core.c |  46 ++++-
 drivers/dma/dw-edma/dw-hdma-v0-core.c |  68 +++++--
 include/linux/dma/edma.h              |  51 ++++++
 6 files changed, 479 insertions(+), 116 deletions(-)

-- 
2.51.0




Copyright © 2026, Eklektix, Inc.
Comments and public postings are copyrighted by their creators.
Linux is a registered trademark of Linus Torvalds