Add RTC support for Renesas RZ/T2H and RZ/N2H SoCs [LWN.net]

From:		Prabhakar <prabhakar.csengg-AT-gmail.com>
To:		Miquel Raynal <miquel.raynal-AT-bootlin.com>, Alexandre Belloni <alexandre.belloni-AT-bootlin.com>, Rob Herring <robh-AT-kernel.org>, Krzysztof Kozlowski <krzk+dt-AT-kernel.org>, Conor Dooley <conor+dt-AT-kernel.org>, Geert Uytterhoeven <geert+renesas-AT-glider.be>, Magnus Damm <magnus.damm-AT-gmail.com>, Wolfram Sang <wsa+renesas-AT-sang-engineering.com>
Subject:		[PATCH 00/12] Add RTC support for Renesas RZ/T2H and RZ/N2H SoCs
Date:		Mon, 15 Jun 2026 16:47:53 +0100
Message-ID:		<20260615154805.1619693-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc:		linux-rtc-AT-vger.kernel.org, linux-renesas-soc-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, Prabhakar <prabhakar.csengg-AT-gmail.com>, Biju Das <biju.das.jz-AT-bp.renesas.com>, Fabrizio Castro <fabrizio.castro.jz-AT-renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj-AT-bp.renesas.com>
Archive-link:		Article

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi all,

This series adds support for the RTC IP found on the Renesas RZ/T2H and
RZ/N2H SoCs.

The RTC block is closely related to the RZ/N1 implementation and can
reuse the existing driver infrastructure when operating in SCMP mode,
which is required on these SoCs due to their 195.3 kHz RTC input clock.

While the RZ/T2H and RZ/N2H variants do not implement the RTCA0SUBU and
RTCA0TCR registers present on RZ/N1, those registers are not accessed by
the driver in SCMP mode, allowing support to be added with minimal
changes.

The RZ/T2H RTC variant also supports a 1 Hz output signal on the
RTCAT1HZ pin, controlled by the RTCA0CTL1[RTCA01HZE] bit. This bit is
marked as reserved in the RZ/N1 hardware manual, making RZ/T2H a
distinct RTC variant despite its overall compatibility with the RZ/N1
implementation.

The series consists of:
dt-bindings updates to describe the RZ/T2H and RZ/N2H RTC variants,
driver updates to recognize the new compatible string and enable
support for these SoCs.

Cheers,
Prabhakar

Lad Prabhakar (12):
  dt-bindings: rtc: renesas,rzn1-rtc: Add RZ/T2H and RZ/N2H support
  rtc: rzn1: Handle EPROBE_DEFER for optional pps interrupt
  rtc: rzn1: Fix malformed MODULE_AUTHOR string
  rtc: Kconfig: Broaden RTC_DRV_RZN1 dependency to ARCH_RENESAS
  rtc: rzn1: Add system suspend/resume support and wakeup capability
  rtc: rzn1: Sort headers alphabetically
  rtc: rzn1: fix alarm range check truncation on 32-bit systems
  rtc: rzn1: Dynamically calculate synchronization delay based on clock
    rate
  rtc: rzn1: Use temporary variable for struct device
  rtc: rzn1: Consistently use dev_err_probe()
  rtc: rzn1: use FIELD_PREP/FIELD_GET and GENMASK for register access
  rtc: rzn1: Add support for Renesas RZ/T2H and RZ/N2H SoCs

 .../bindings/rtc/renesas,rzn1-rtc.yaml        |  35 +++-
 drivers/rtc/Kconfig                           |   5 +-
 drivers/rtc/rtc-rzn1.c                        | 182 ++++++++++++++----
 3 files changed, 173 insertions(+), 49 deletions(-)

-- 
2.54.0