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selftests/resctrl: increase L3 cache test coverage

From:  Richard Cheng <icheng-AT-nvidia.com>
To:  tony.luck-AT-intel.co, reinette.chatre-AT-intel.com, shuah-AT-kernel.org
Subject:  [PATCH 0/3] selftests/resctrl: increase L3 cache test coverage
Date:  Mon, 08 Jun 2026 19:06:38 +0800
Message-ID:  <20260608110641.44457-1-icheng@nvidia.com>
Cc:  Dave.Martin-AT-arm.com, james.morse-AT-arm.com, babu.moger-AT-amd.com, linux-kernel-AT-vger.kernel.org, linux-kselftest-AT-vger.kernel.org, fenghuay-AT-nvidia.com, newtonl-AT-nvidia.com, kristinc-AT-nvidia.com, kaihengf-AT-nvidia.com, kobak-AT-nvidia.com, sdonthineni-AT-nvidia.com, Richard Cheng <icheng-AT-nvidia.com>
Archive-link:  Article

The resctrl selftests check L3 cache isolation (L3_CAT) and occupancy
accuracy (CMT), but some basic L3 behaviour is untested: that an allocation
actually bounds a group's cache use, that invalid CBMs are rejected, and
that info/L3/bit_usage reports allocations correctly.

Add three self-contained tests for these. Each gates on the feature
it needs, so it runs wherever that feature exists and skips otherwise.
They were exercised on an arm64 MPAM platform.

Richard Cheng (3):
  selftests/resctrl: Add L3_CAT_OCCUP test to verify CAT bounds
    occupancy
  selftests/resctrl: Add L3_CAT_VALIDATE to check invalid CBMs
  selftests/resctrl: Add L3_BIT_USAGE to check bit_usage tracks
    allocation

 tools/testing/selftests/resctrl/cat_test.c    | 433 ++++++++++++++++++
 tools/testing/selftests/resctrl/cmt_test.c    |   3 -
 tools/testing/selftests/resctrl/resctrl.h     |   6 +
 .../testing/selftests/resctrl/resctrl_tests.c |   3 +
 4 files changed, 442 insertions(+), 3 deletions(-)

-- 
2.43.0




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