| From: |
| Prabhakar <prabhakar.csengg-AT-gmail.com> |
| To: |
| Manivannan Sadhasivam <mani-AT-kernel.org>, Claudiu Beznea <claudiu.beznea.uj-AT-bp.renesas.com>, Bjorn Helgaas <bhelgaas-AT-google.com>, Lorenzo Pieralisi <lpieralisi-AT-kernel.org>, Krzysztof Wilczyński <kwilczynski-AT-kernel.org>, Rob Herring <robh-AT-kernel.org>, Krzysztof Kozlowski <krzk+dt-AT-kernel.org>, Conor Dooley <conor+dt-AT-kernel.org>, Philipp Zabel <p.zabel-AT-pengutronix.de>, Geert Uytterhoeven <geert+renesas-AT-glider.be>, Magnus Damm <magnus.damm-AT-gmail.com> |
| Subject: |
| [PATCH v3 0/4] Add PCIe support for RZ/V2H(P) SoC |
| Date: |
| Wed, 20 May 2026 17:48:19 +0100 |
| Message-ID: |
| <20260520164823.436992-1-prabhakar.mahadev-lad.rj@bp.renesas.com> |
| Cc: |
| linux-pci-AT-vger.kernel.org, linux-renesas-soc-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, Prabhakar <prabhakar.csengg-AT-gmail.com>, Biju Das <biju.das.jz-AT-bp.renesas.com>, Fabrizio Castro <fabrizio.castro.jz-AT-renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj-AT-bp.renesas.com> |
| Archive-link: |
| Article |
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi all,
This series adds support for the PCIe host controllers found on the
Renesas RZ/V2H(P) SoCs. The RZ/V2H(P) controller includes additional
features for PCIe lane control and supports multilink operation with
two independent controllers.
v2->v3:
- Dropped using linux,pci-domain property.
- Switched property to phandle-array for renesas,sysc
to support multiple controllers with different SYSC register sets.
- Parsed controller-id from the "renesas,sysc" property instead of
using linux,pci-domain.
- Updated commit message for clarity in patch #1
v1->v2:
- Dropped RZ/V2N DT binding patch as it has been merged in the
pci/dt-binding branch.
- Dropped un-necessary new line in schema.
- Renamed RZG3S_PCIE_CHANNEL_ID* to RZG3S_PCIE_CONTROLLER_ID* for clarity.
- Added locks to protect shared lane configuration state and
prevent concurrent access issues during probe.
- Added cleanup action to release lanes on driver removal.
- Reconfigured RZG3S_SYSC_FUNC_ID_LINK_MASTER in resume path.
- Renamed num_channels to num_pcie_controllers for clarity.
- Updated commit messages for clarity in patches 1-4.
note, the patches have been rebased on top of next-20260520.
Cheers,
Prabhakar
Lad Prabhakar (4):
dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2H(P) support
PCI: rzg3s-host: Use shared reset controls for power domain resets
PCI: rzg3s-host: Prepare System Controller handling for multiple
controllers
PCI: rzg3s-host: Add support for RZ/V2H(P) SoC
.../bindings/pci/renesas,r9a08g045-pcie.yaml | 34 ++-
drivers/pci/controller/pcie-rzg3s-host.c | 232 ++++++++++++++++--
2 files changed, 246 insertions(+), 20 deletions(-)
--
2.54.0
