| From: |
| Biju <biju.das.au-AT-gmail.com> |
| To: |
| Geert Uytterhoeven <geert+renesas-AT-glider.be>, Michael Turquette <mturquette-AT-baylibre.com>, Stephen Boyd <sboyd-AT-kernel.org> |
| Subject: |
| [PATCH v6 0/3] Add support for Renesas RZ/G3L GBETH clocks |
| Date: |
| Thu, 23 Apr 2026 14:50:44 +0100 |
| Message-ID: |
| <20260423135050.238400-1-biju.das.jz@bp.renesas.com> |
| Cc: |
| Biju Das <biju.das.jz-AT-bp.renesas.com>, linux-renesas-soc-AT-vger.kernel.org, linux-clk-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj-AT-bp.renesas.com>, Biju Das <biju.das.au-AT-gmail.com> |
| Archive-link: |
| Article |
From: Biju Das <biju.das.jz@bp.renesas.com>
Add support for Renesas RZ/G3L GBETH clocks and reset signals.
v5->v6:
* Dropped patch#1 from series as it is accepted for 7.2.
* Fixed the typo in comment stanby->standby.
* Updated parent of ETHRM{0,1} clocks to CLK_SEL_ETH{0,1}_RM
* Fixed various DEF_COUPLED macro alignment issues by splitting it into 3
lines.
* Collected the tags.
v4->v5:
* Rebased to boot series [2]
v3->v4:
* Updated commit description
* Fixed mstop bit for eth1_clk_chi and eth0_{tx,rx}_i_rmii clocks
* Added r9a08g046_no_pm_mod_clks to avoid PM framework enabling both
rgmii and rmii clocks together as they are mutually exclusive.
* Fixed checkpatch warning for more than 100 columns
v2->v3:
* Added eth{0,1}_{tx,rx}_i_rmii clocks.
* Collected tag for patch#1
v1->v2:
* Separated ethernet patches from series [1]
[1] https://lore.kernel.org/all/20260128125850.425264-1-biju....
Biju Das (3):
clk: renesas: rzg2l: Add support for enabling PLLs
clk: renesas: r8a08g046: Add support for PLL6 clk
clk: renesas: r9a08g046: Add clock and reset signals for the GBETH IPs
drivers/clk/renesas/r9a08g046-cpg.c | 157 ++++++++++++++++++++++++++++
drivers/clk/renesas/rzg2l-cpg.c | 67 ++++++++++++
drivers/clk/renesas/rzg2l-cpg.h | 10 ++
3 files changed, 234 insertions(+)
--
2.43.0
