| From: |
| Akhil R <akhilrajeev-AT-nvidia.com> |
| To: |
| <dmaengine-AT-vger.kernel.org>, <linux-tegra-AT-vger.kernel.org> |
| Subject: |
| [PATCH 0/8] Add GPCDMA support in Tegra264 |
| Date: |
| Tue, 17 Feb 2026 23:04:49 +0530 |
| Message-ID: |
| <20260217173457.18628-1-akhilrajeev@nvidia.com> |
| Cc: |
| <devicetree-AT-vger.kernel.org>, <linux-kernel-AT-vger.kernel.org>, <vkoul-AT-kernel.org>, <Frank.Li-AT-kernel.org>, <robh-AT-kernel.org>, <krzk+dt-AT-kernel.org>, <conor+dt-AT-kernel.org>, <thierry.reding-AT-gmail.com>, <jonathanh-AT-nvidia.com>, <p.zabel-AT-pengutronix.de>, Akhil R <akhilrajeev-AT-nvidia.com> |
| Archive-link: |
| Article |
This series adds support for GPCDMA in Tegra264 with an additional
support for separate stream ID for each channel. Tegra264 GPCDMA
controller has changes in the register offset and uses 41 bit
addressing for memory. Add changes in the tegra186-gpc-dma driver
to support these.
Akhil R (8):
dt-bindings: dma: nvidia,tegra186-gpc-dma: Add iommu-map property
dt-bindings: dma: nvidia,tegra186-gpc-dma: Make reset optional
dmaengine: tegra: Make reset control optional
dmaengine: tegra: Use struct for register offsets
dmaengine: tegra: Support address width > 40 bits
dmaengine: tegra: Use iommu-map for stream ID
dmaengine: tegra: Add Tegra264 support
arm64: tegra: Add iommu-map and enable GPCDMA in Tegra264
.../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 27 +-
.../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 4 +
arch/arm64/boot/dts/nvidia/tegra264.dtsi | 33 +-
drivers/dma/tegra186-gpc-dma.c | 441 +++++++++++-------
4 files changed, 337 insertions(+), 168 deletions(-)
--
2.50.1
