| From: |
| Jim Mattson <jmattson-AT-google.com> |
| To: |
| Peter Zijlstra <peterz-AT-infradead.org>, Ingo Molnar <mingo-AT-redhat.com>, Arnaldo Carvalho de Melo <acme-AT-kernel.org>, Namhyung Kim <namhyung-AT-kernel.org>, Mark Rutland <mark.rutland-AT-arm.com>, Alexander Shishkin <alexander.shishkin-AT-linux.intel.com>, Jiri Olsa <jolsa-AT-kernel.org>, Ian Rogers <irogers-AT-google.com>, Adrian Hunter <adrian.hunter-AT-intel.com>, James Clark <james.clark-AT-linaro.org>, Thomas Gleixner <tglx-AT-kernel.org>, Borislav Petkov <bp-AT-alien8.de>, Dave Hansen <dave.hansen-AT-linux.intel.com>, x86-AT-kernel.org, "H. Peter Anvin" <hpa-AT-zytor.com>, Sean Christopherson <seanjc-AT-google.com>, Paolo Bonzini <pbonzini-AT-redhat.com>, Shuah Khan <shuah-AT-kernel.org>, linux-perf-users-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, kvm-AT-vger.kernel.org, linux-kselftest-AT-vger.kernel.org |
| Subject: |
| [PATCH v2 0/5] KVM: x86/pmu: Add support for AMD Host-Only/Guest-Only bits |
| Date: |
| Thu, 29 Jan 2026 15:28:05 -0800 |
| Message-ID: |
| <20260129232835.3710773-1-jmattson@google.com> |
| Cc: |
| mizhang-AT-google.com, yosryahmed-AT-google.com, sandipan.das-AT-amd.com, Jim Mattson <jmattson-AT-google.com> |
| Archive-link: |
| Article |
This series adds support for AMD's Host-Only and Guest-Only performance
counter eventsel bits in KVM's mediated PMU passthrough implementation.
These bits allow an nSVM-enabled guest to configure performance counters
that count only during L1 execution (Host-Only) or only during L2 execution
(Guest-Only).
KVM updates the hardware event selector ENABLE bit at the following state
transitions to ensure counters only count in the appropriate mode:
- EFER.SVME changes: Enable/disable Guest-Only counters
- Nested VMRUN: Disable Host-Only, enable Guest-Only counters
- Nested VMEXIT: Enable Host-Only, disable Guest-Only counters
v1: https://lore.kernel.org/kvm/20260121225438.3908422-1-jmat...
v1 -> v2:
- Fixed various style issues, including indentation, comment
placement, and comparison to 0 [Sean]
- Replaced "hg_only" with "host_guest" [Sean]
- Reversed the polarity of the dormant/active logic [Sean]
- Removed the pmc_hostonly and pmc_guestonly bitmaps [Sean]
- Added a refresh helper that iterates over PMCs during transitions [Sean]
- Introduced svm_enter_guest_mode() and svm_leave_guest_mode() [Sean]
- Moved transition logic from VMRUN/VMEXIT emulation to the above [Sean]
- Moved architectural definitions in the selftest to pmu.h [Sean]
- Added a test for neither Host-Only nor Guest-Only [Sean]
- Refactored the selftest to program all 4 bit combinations
simultaneously, reducing code replication [Sean]
Jim Mattson (5):
KVM: x86/pmu: Introduce amd_pmu_set_eventsel_hw()
KVM: x86/pmu: Disable Host-Only/Guest-Only events as appropriate for
vCPU state
KVM: x86/pmu: Refresh Host-Only/Guest-Only eventsel at nested
transitions
KVM: x86/pmu: Allow Host-Only/Guest-Only bits with nSVM and mediated
PMU
KVM: selftests: x86: Add svm_pmu_host_guest_test for
Host-Only/Guest-Only bits
arch/x86/include/asm/perf_event.h | 2 +
arch/x86/kvm/svm/nested.c | 6 +-
arch/x86/kvm/svm/pmu.c | 42 +++-
arch/x86/kvm/svm/svm.c | 2 +
arch/x86/kvm/svm/svm.h | 17 ++
tools/testing/selftests/kvm/Makefile.kvm | 1 +
tools/testing/selftests/kvm/include/x86/pmu.h | 6 +
.../kvm/x86/svm_pmu_host_guest_test.c | 199 ++++++++++++++++++
8 files changed, 270 insertions(+), 5 deletions(-)
create mode 100644 tools/testing/selftests/kvm/x86/svm_pmu_host_guest_test.c
base-commit: 1a424e9e0616db91010f08e5985bcc6edc504205
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2.53.0.rc1.225.gd81095ad13-goog
