| From: |
| Manikanta Maddireddy <mmaddireddy-AT-nvidia.com> |
| To: |
| <bhelgaas-AT-google.com>, <lpieralisi-AT-kernel.org>, <kwilczynski-AT-kernel.org>, <mani-AT-kernel.org>, <robh-AT-kernel.org>, <krzk+dt-AT-kernel.org>, <conor+dt-AT-kernel.org>, <thierry.reding-AT-gmail.com>, <jonathanh-AT-nvidia.com>, <jingoohan1-AT-gmail.com>, <vidyas-AT-nvidia.com>, <cassel-AT-kernel.org>, <18255117159-AT-163.com> |
| Subject: |
| [PATCH V4 00/22] Enhancements to pcie-tegra194 driver |
| Date: |
| Mon, 26 Jan 2026 13:14:57 +0530 |
| Message-ID: |
| <20260126074519.3426742-1-mmaddireddy@nvidia.com> |
| Cc: |
| <linux-pci-AT-vger.kernel.org>, <devicetree-AT-vger.kernel.org>, <linux-tegra-AT-vger.kernel.org>, <linux-kernel-AT-vger.kernel.org>, "Manikanta Maddireddy" <mmaddireddy-AT-nvidia.com> |
| Archive-link: |
| Article |
This series[1] was originally posted by Vidya Sagar, and I have rebased
it onto 6.19.0-rc6-next. I addressed review comments, reworked a patch
and included four new patches. I verified these patches on Jetson AGX
Orin(Tegra234 SoC).
Disabling L1SS capability based on support-clkreq device tree property
is moved to common DWC driver, so I reworked below patch to disable
just L1.2 capability on Tegra234 SoC.
- PCI: tegra194: Disable L1.2 capability of Tegra234 EP
I added below four new patches to fix bugs, commit message of each
patch has the details on the bug and fix.
- PCI: tegra194: Add ASPM L1 entrance latency config
- PCI: tegra194: Use HW version number
- PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on
- PCI: tegra194: Disable PERST IRQ only in Endpoint mode
I added more context in the commit message for below patch based on review
comment in V3.
- PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration
Rest of the patches are same as the original V3 series, just rebased them on
6.19.0-rc6-next.
Verification details.
- I verified both Root port and Endpoint mode controllers on Tegra234 SoC.
- Basic sanity Link up, configuration space access and BAR access are verified.
- I verified that ASPM L1.2 capability is disabled for Endpoint mode.
- I verified suspend to RAM tests with Endpoint mode.
[1] https://patchwork.kernel.org/project/linux-pci/patch/2022...
Manikanta Maddireddy (4):
PCI: tegra194: Add ASPM L1 entrance latency config
PCI: tegra194: Use HW version number
PCI: tegra194: Fix CBB timeout caused by DBI access before core
power-on
PCI: tegra194: Disable PERST IRQ only in Endpoint mode
Vidya Sagar (18):
PCI: tegra194: Use devm_gpiod_get_optional() to parse
"nvidia,refclk-select"
PCI: tegra194: Drive CLKREQ signal low explicitly
PCI: tegra194: Fix polling delay for L2 state
PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP
PCI: tegra194: Refactor LTSSM state polling on surprise down
PCI: tegra194: Disable direct speed change for EP
PCI: tegra194: Calibrate P2U for endpoint mode
PCI: tegra194: Free resources during controller deinitialization
PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt
registration
PCI: tegra194: Enable DMA interrupt
PCI: tegra194: Enable hardware hot reset mode in Endpoint
PCI: tegra194: Allow system suspend when the Endpoint link is not up
PCI: tegra194: Disable L1.2 capability of Tegra234 EP
PCI: tegra194: Set LTR message request before PCIe link up
PCI: tegra194: Don't force the device into the D0 state before L2
PCI: tegra194: Free up EP resources during remove()
dt-bindings: PCI: tegra194: Add monitor clock support
PCI: tegra194: Add core monitor clock support
.../bindings/pci/nvidia,tegra194-pcie-ep.yaml | 6 +-
.../bindings/pci/nvidia,tegra194-pcie.yaml | 6 +-
drivers/pci/controller/dwc/pcie-designware.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.h | 2 +
drivers/pci/controller/dwc/pcie-tegra194.c | 268 +++++++++++-------
5 files changed, 181 insertions(+), 103 deletions(-)
--
2.34.1