| From: |
| Timur Tabi <ttabi-AT-nvidia.com> |
| To: |
| Gary Guo <gary-AT-garyguo.net>, Danilo Krummrich <dakr-AT-kernel.org>, "Alexandre Courbot" <acourbot-AT-nvidia.com>, John Hubbard <jhubbard-AT-nvidia.com>, "Joel Fernandes" <joelagnelf-AT-nvidia.com>, <rust-for-linux-AT-vger.kernel.org>, <nouveau-AT-lists.freedesktop.org> |
| Subject: |
| [PATCH v7 00/12] gpu: nova-core: add Turing support |
| Date: |
| Wed, 21 Jan 2026 17:52:50 -0600 |
| Message-ID: |
| <20260121235302.1962185-1-ttabi@nvidia.com> |
| Archive-link: |
| Article |
Note: This patchset requires "[PATCH v3 2/7] rust: io: always inline
functions using build_assert with arguments" in order to compile
with CLIPPY.
Note 2: This patch set does not include the upcoming refactor for
handling the Generic Bootloader.
This patch set adds basic support for pre-booting GSP-RM
on Turing.
There is also partial support for GA100, but it's currently not
fully implemented. GA100 is considered experimental in Nouveau,
and so it hasn't been tested with NovaCore either.
The latest linux-firmware.git is required because it contains the
Generic Bootloader image that has not yet been propogated to
distros.
Summary of changes:
1. Introduce non-secure IMEM support. For GA102 and later, only secure IMEM
is used.
2. Because of non-secure IMEM, Turing booter firmware images need some of
the headers parsed differently for stuff like the load target address.
3. Add support the tu10x firmware signature section in the ELF image.
4. Add several new registers used only on Turing.
5. Some functions that were considered generic Falcon operations are
actually different on Turing vs GA102+, so they are moved to the HAL.
6. The FRTS FWSEC firmware in VBIOS uses a different version of the
descriptor header.
7. On Turing/GA100 LIBOS args struct needs to have its 'size' field
aligned to 4KB. So pad the struct to make it 4K.
8. Turing Falcons do not support DMA, so PIO is used to copy images
into IMEM/DMEM.
9. Load the Generic Bootloader from disk and use it to boot FWSEC on
Turing and GA100.
Changes from v6:
1. Miscellaneous refactoring to FalconUCodeDescV2 code, based on review
feedback, to make the code more consistent.
2. Added NV_PFALCON_FALCON_ENGINE::reset_engine()
3. Removed `port` parameter from pio_wr_bytes and just hard-coded it to 0.
4. Removed supports_dma patch
5. Renamed pr_wr_bytes to pr_wr_slice
6. Simplified NV_PFALCON_FALCON_DMEMD loop
7. Misc minor code improvements based on review feedback.
Alexandre Courbot (1):
gpu: nova-core: align LibosMemoryRegionInitArgument size to page size
Timur Tabi (11):
gpu: nova-core: rename Imem to ImemSecure
gpu: nova-core: add ImemNonSecure section infrastructure
gpu: nova-core: support header parsing on Turing/GA100
gpu: nova-core: add support for Turing/GA100 fwsignature
gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem()
gpu: nova-core: move some functions into the HAL
gpu: nova-core: Add basic Turing HAL
gpu: nova-core: add NV_PFALCON_FALCON_ENGINE::reset_engine()
gpu: nova-core: add Falcon HAL method load_method()
gpu: nova-core: add FalconUCodeDescV2 support
gpu: nova-core: add PIO support for loading firmware images
drivers/gpu/nova-core/falcon.rs | 252 ++++-
drivers/gpu/nova-core/falcon/hal.rs | 26 +
drivers/gpu/nova-core/falcon/hal/ga102.rs | 39 +
drivers/gpu/nova-core/falcon/hal/tu102.rs | 77 ++
drivers/gpu/nova-core/firmware.rs | 203 +++-
drivers/gpu/nova-core/firmware/booter.rs | 43 +-
drivers/gpu/nova-core/firmware/fwsec.rs | 178 +++-
drivers/gpu/nova-core/firmware/gsp.rs | 6 +-
drivers/gpu/nova-core/gsp.rs | 8 +-
drivers/gpu/nova-core/gsp/boot.rs | 6 +-
drivers/gpu/nova-core/gsp/fw.rs | 14 +-
drivers/gpu/nova-core/regs.rs | 72 +-
drivers/gpu/nova-core/vbios.rs | 64 +-
drivers/gpu/nova-core/vbios.rs.orig | 1105 +++++++++++++++++++++
14 files changed, 1964 insertions(+), 129 deletions(-)
create mode 100644 drivers/gpu/nova-core/falcon/hal/tu102.rs
create mode 100644 drivers/gpu/nova-core/vbios.rs.orig
base-commit: 6ea52b6d8f33ae627f4dcf43b12b6e713a8b9331
--
2.52.0