| From: |
| Yunhui Cui <cuiyunhui-AT-bytedance.com> |
| To: |
| paul.walmsley-AT-sifive.com, palmer-AT-dabbelt.com, aou-AT-eecs.berkeley.edu, alex-AT-ghiti.fr, conor-AT-kernel.org, cuiyunhui-AT-bytedance.com, luxu.kernel-AT-bytedance.com, atishp-AT-rivosinc.com, cleger-AT-rivosinc.com, ajones-AT-ventanamicro.com, apatel-AT-ventanamicro.com, linux-kernel-AT-vger.kernel.org, linux-riscv-AT-lists.infradead.org, songshuaishuai-AT-tinylab.org, bjorn-AT-rivosinc.com, charlie-AT-rivosinc.com, masahiroy-AT-kernel.org, valentina.fernandezalanis-AT-microchip.com, jassisinghbrar-AT-gmail.com, conor.dooley-AT-microchip.com |
| Subject: |
| [PATCH 0/3] Add NMI Support to RISC-V via SSE |
| Date: |
| Mon, 27 Oct 2025 21:34:28 +0800 |
| Message-ID: |
| <20251027133431.15321-1-cuiyunhui@bytedance.com> |
| Archive-link: |
| Article |
We thank Clément Léger (Rivos Inc.) for his foundational SSE
work ([1]), upon which this patch series builds. This series adds
NMI support to RISC-V via SSE, with two key focuses:
1. A PR to the RISC-V SBI spec ([2]) for unknown NMI handling, with
matching Linux kernel changes.
2. Extending NMI usage to all system scenarios where it boosts
robustness—e.g., stopping CPUs during crashes.
[1] https://lore.kernel.org/all/20250908181717.1997461-1-cleg...
[2] https://github.com/riscv-non-isa/riscv-sbi-doc/pull/223
Yunhui Cui (3):
drivers: firmware: riscv: add SSE NMI support
riscv: crash: move IPI crash handling logic to crash.c
riscv: crash: use NMI to stop the CPU
MAINTAINERS | 7 ++
arch/riscv/include/asm/crash.h | 17 ++++
arch/riscv/include/asm/sbi.h | 2 +
arch/riscv/include/asm/smp.h | 14 +++
arch/riscv/kernel/Makefile | 2 +-
arch/riscv/kernel/crash.c | 111 +++++++++++++++++++++++
arch/riscv/kernel/smp.c | 99 +-------------------
drivers/firmware/riscv/Kconfig | 10 +++
drivers/firmware/riscv/Makefile | 1 +
drivers/firmware/riscv/sse_nmi.c | 150 +++++++++++++++++++++++++++++++
include/linux/sse_nmi.h | 8 ++
11 files changed, 323 insertions(+), 98 deletions(-)
create mode 100644 arch/riscv/include/asm/crash.h
create mode 100644 arch/riscv/kernel/crash.c
create mode 100644 drivers/firmware/riscv/sse_nmi.c
create mode 100644 include/linux/sse_nmi.h
--
2.39.5
