| From: |
| Nick Chan <towinchenmi-AT-gmail.com> |
| To: |
| Will Deacon <will-AT-kernel.org>, Mark Rutland <mark.rutland-AT-arm.com>, Rob Herring <robh-AT-kernel.org>, Krzysztof Kozlowski <krzk+dt-AT-kernel.org>, Conor Dooley <conor+dt-AT-kernel.org>, Catalin Marinas <catalin.marinas-AT-arm.com> |
| Subject: |
| [PATCH v5 00/11] drivers/perf: apple_m1: Add Apple A7-A11, T2 SoC support |
| Date: |
| Fri, 28 Feb 2025 12:06:40 +0800 |
| Message-ID: |
| <20250228-apple-cpmu-v5-0-9e124cd28ed4@gmail.com> |
| Cc: |
| Marc Zyngier <maz-AT-kernel.org>, linux-arm-kernel-AT-lists.infradead.org, linux-perf-users-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, asahi-AT-lists.linux.dev, linux-kernel-AT-vger.kernel.org, Nick Chan <towinchenmi-AT-gmail.com>, Krzysztof Kozlowski <krzysztof.kozlowski-AT-linaro.org> |
| Archive-link: |
| Article |
This series adds support for the CPU PMU in the older Apple A7-A11, T2
SoCs. These PMUs may have a different event layout, less counters, or
deliver their interrupts via IRQ instead of a FIQ. Since some of those
older SoCs support 32-bit EL0, counting for 32-bit EL0 also need to
be enabled by the driver where applicable.
Patch 1 adds the DT bindings.
Patch 2-6 prepares the driver to allow adding support for those
older SoCs.
Patch 7-11 adds support for the older SoCs.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
---
Changes in v5:
- Slightly change "drivers/perf: apple_m1: Add Apple A11 Support", to keep things in
chronological order.
- Link to v4: https://lore.kernel.org/r/20250214-apple-cpmu-v4-0-ffca0e...
Changes in v4:
- Support per-implementation event attr group
- Fix Apple A7 event attr groups
- Link to v3: https://lore.kernel.org/r/20250213-apple-cpmu-v3-0-be7f8a...
Changes in v3:
- Configure PMC8 and PMC9 for 32-bit EL0
- Remove redundant _common suffix from shared functions
- Link to v2: https://lore.kernel.org/r/20250213-apple-cpmu-v2-0-87b361...
Changes in v2:
- Remove unused flags parameter from apple_pmu_init_common()
- Link to v1: https://lore.kernel.org/r/20250212-apple-cpmu-v1-0-f8c7f2...
---
Nick Chan (11):
dt-bindings: arm: pmu: Add Apple A7-A11, T2 SoC CPU PMU compatibles
drivers/perf: apple_m1: Support per-implementation event tables
drivers/perf: apple_m1: Support a per-implementation number of counters
drivers/perf: apple_m1: Support configuring counters for 32-bit EL0
drivers/perf: apple_m1: Support per-implementation PMU startup
drivers/perf: apple_m1: Support per-implementation event attr group
drivers/perf: apple_m1: Add Apple A7 support
drivers/perf: apple_m1: Add Apple A8/A8X support
drivers/perf: apple_m1: Add A9/A9X support
drivers/perf: apple_m1: Add Apple A10/A10X/T2 Support
drivers/perf: apple_m1: Add Apple A11 Support
Documentation/devicetree/bindings/arm/pmu.yaml | 6 +
arch/arm64/include/asm/apple_m1_pmu.h | 3 +
drivers/perf/apple_m1_cpu_pmu.c | 801 ++++++++++++++++++++++++-
3 files changed, 777 insertions(+), 33 deletions(-)
---
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
change-id: 20250211-apple-cpmu-5a5a3da39483
Best regards,
--
Nick Chan <towinchenmi@gmail.com>
