cxl: support CXL memory RAS features
| From: | shiju.jose-AT-huawei.com | |
| To: | <linux-cxl-AT-vger.kernel.org>, <dan.j.williams-AT-intel.com>, <dave-AT-stgolabs.net>, <jonathan.cameron-AT-huawei.com>, <dave.jiang-AT-intel.com>, <alison.schofield-AT-intel.com>, <vishal.l.verma-AT-intel.com>, <ira.weiny-AT-intel.com>, <david-AT-redhat.com>, <Vilas.Sridharan-AT-amd.com> | |
| Subject: | [PATCH 0/8] cxl: support CXL memory RAS features | |
| Date: | Thu, 27 Feb 2025 22:38:07 +0000 | |
| Message-ID: | <20250227223816.2036-1-shiju.jose@huawei.com> | |
| Cc: | <linux-edac-AT-vger.kernel.org>, <linux-acpi-AT-vger.kernel.org>, <linux-mm-AT-kvack.org>, <linux-kernel-AT-vger.kernel.org>, <bp-AT-alien8.de>, <tony.luck-AT-intel.com>, <rafael-AT-kernel.org>, <lenb-AT-kernel.org>, <mchehab-AT-kernel.org>, <leo.duran-AT-amd.com>, <Yazen.Ghannam-AT-amd.com>, <rientjes-AT-google.com>, <jiaqiyan-AT-google.com>, <Jon.Grimm-AT-amd.com>, <dave.hansen-AT-linux.intel.com>, <naoya.horiguchi-AT-nec.com>, <james.morse-AT-arm.com>, <jthoughton-AT-google.com>, <somasundaram.a-AT-hpe.com>, <erdemaktas-AT-google.com>, <pgonda-AT-google.com>, <duenwen-AT-google.com>, <gthelen-AT-google.com>, <wschwartz-AT-amperecomputing.com>, <dferguson-AT-amperecomputing.com>, <wbs-AT-os.amperecomputing.com>, <nifan.cxl-AT-gmail.com>, <yazen.ghannam-AT-amd.com>, <tanxiaofei-AT-huawei.com>, <prime.zeng-AT-hisilicon.com>, <roberto.sassu-AT-huawei.com>, <kangkang.shen-AT-futurewei.com>, <wanghuiqiang-AT-huawei.com>, <linuxarm-AT-huawei.com>, <shiju.jose-AT-huawei.com> | |
| Archive-link: | Article |
From: Shiju Jose <shiju.jose@huawei.com> Support for CXL memory RAS features: patrol scrub, ECS, soft-PPR and memory sparing. This CXL series was part of the EDAC series [1]. The code is based on cxl.git: next branch [2] merged with ras.git: edac-cxl branch [3]. 1. https://lore.kernel.org/linux-cxl/20250212143654.1893-1-s... 2. https://web.git.kernel.org/pub/scm/linux/kernel/git/cxl/c... 3. https://web.git.kernel.org/pub/scm/linux/kernel/git/ras/r... Userspace code for CXL memory repair features [4] and sample boot-script for CXL memory repair [5]. [4]: https://lore.kernel.org/lkml/20250207143028.1865-1-shiju.... [5]: https://lore.kernel.org/lkml/20250207143028.1865-5-shiju.... Shiju Jose (8): cxl: Add helper function to retrieve a feature entry cxl/memfeature: Add CXL memory device patrol scrub control feature cxl/memfeature: Add CXL memory device ECS control feature cxl/mbox: Add support for PERFORM_MAINTENANCE mailbox command cxl/region: Add helper function to determine memory is online cxl: Support for finding memory operation attributes from the current boot cxl/memfeature: Add CXL memory device soft PPR control feature cxl/memfeature: Add CXL memory device memory sparing control feature Documentation/edac/memory_repair.rst | 103 ++ Documentation/edac/scrub.rst | 64 + drivers/cxl/Kconfig | 20 + drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 11 + drivers/cxl/core/features.c | 20 + drivers/cxl/core/mbox.c | 45 +- drivers/cxl/core/memdev.c | 9 + drivers/cxl/core/memfeatures.c | 1728 ++++++++++++++++++++++++++ drivers/cxl/core/ras.c | 151 +++ drivers/cxl/core/region.c | 15 + drivers/cxl/cxlmem.h | 82 ++ drivers/cxl/mem.c | 4 + drivers/cxl/pci.c | 3 + drivers/edac/mem_repair.c | 9 + include/linux/edac.h | 7 + 16 files changed, 2270 insertions(+), 2 deletions(-) create mode 100644 drivers/cxl/core/memfeatures.c create mode 100644 drivers/cxl/core/ras.c -- 2.43.0