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Basic perf PMU support for Haswell v2

From:  Andi Kleen <andi@firstfloor.org>
To:  mingo@kernel.org
Subject:  Basic perf PMU support for Haswell v2
Date:  Thu, 31 Jan 2013 14:51:38 -0800
Message-ID:  <1359672710-19528-1-git-send-email-andi@firstfloor.org>
Cc:  linux-kernel@vger.kernel.org, a.p.zijlstra@chello.nl, akpm@linux-foundation.org, acme@redhat.com, eranian@google.com, jolsa@redhat.com, namhyung@kernel.org
Archive-link:  Article, Thread

This is based on v7 of the full Haswell PMU support, but 
ported to the latest perf/core and stripped down to the "basic support"
as requested.  I consider all of this basic support for Haswell usage.
although it's a bit more than what you need if you never use -e cpu//
or -b options.  I decided to include LBRs in the basic support. 

Contains support for:
- Basic Haswell PMU and PEBS support
- Late unmasking of the PMI
- Support for wide counters
- New TSX counter flags, exported as sysfs attributes
- Support for checkpointed counters.
- New LBR flags, exported as new flags with tools support

Available from 
git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-misc hsw/pmu5-basics

For more details on the Haswell PMU please see the SDM (Vol 3A, Chapter 19.2)
http://www.intel.com/content/www/us/en/processors/archite...
For more details on TSX please see http://halobates.de/adding-lock-elision-to-linux.pdf
or next week's LWN.

v2: Addressed Stephane's feedback. See individual patches for details.

-Andi
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