MIPS is an interesting case. MIPS has had a 64-bit design for a long time, and it's not bad, mostly. Unfortunately, its memory model suffers from the same problems as the Alpha: you can't count on anything happening in order, as seen from another processor, so you can't program a MIPS SMP without somebody else making guarantees beyond the architecture spec. x86 has the opposite problem: it promises so much that a 16-way x86 might spend most of its time waiting at barriers for memory state to settle, just in case. The Power64 and Itanic designs hit workable (but different) compromises. We can only hope the AArgh64 architects took advantage of hindsight, because without it maybe only Power64 has MP legs.