"The IOMMU code is not particularly ARM-specific, Szyprowski said; it could be used for other architectures."
My $0.02: Hhaving worked on 4 different IOMMUs, I believe *in general* the IOMMU code is mostly chip specific, as well as possibly arch specific. I have not looked at the IOMMU code for ARM platforms (yet) and those might easily share most of the code within the ARM platforms.
The problem is for good performance, each IOMMU implements an IO TLB (Translation Look-aside buffer). Behaviors for prefetching or replacing entries in the TLB will depending on the specific chip. This is turn will dictate the "optimal" algorithm for allocating DMA mappings to specific devices. For examples, see ccio-dma.c and sba_iommu.c. James Bottomley refactored so they share some code, but not the allocation policy.
Maintaining coherency between CPU (updates to the IO Page Directory) and the IOMMU is "arch dependent" depending on the CPU cache coherency protocol (e.g. VIVT vs PIPT). IOMMU is normally using a "physical addreess" to reference the IO Pdir and the CPU is using a virtual address. Optimal solutions to making this work will depend on the CPU architecture.