|| ||"Michael S. Tsirkin" <email@example.com> |
|| ||firstname.lastname@example.org, email@example.com |
|| ||[PATCHv9 0/8] kvm: eoi optimization support |
|| ||Sun, 24 Jun 2012 19:24:12 +0300|
|| ||Ingo Molnar <firstname.lastname@example.org>, "H. Peter Anvin" <email@example.com>,
Avi Kivity <firstname.lastname@example.org>,
Marcelo Tosatti <email@example.com>, firstname.lastname@example.org,
Linus Torvalds <email@example.com>,
firstname.lastname@example.org, Thomas Gleixner <email@example.com>|
|| ||Article, Thread
I'm looking at reducing the interrupt overhead for virtualized guests:
some workloads spend a large part of their time processing interrupts.
On kvm, an EOI write from the guest causes an expensive exit to host; we
avoid this using shared memory.
The patches work fine on my boxes. See individual patches
for perf tests. You need to patch qemu to whitelist the kvm feature.
qemu patch was sent separately.
The patches are against Linus's master and apply to kvm.git
cleanly. The last patch in the series, supplying the host
part, also depends on the ISR optimization patch that I
have for convenience included in the series (patch 2),
I also included a documentation patch (patch 1) - it is
here since it clarifies patch 2. This revision does not yet address
Thomas's idea of reworking the APIC page handling. Changes to this
optimization would require reworking this last patch in the series.
The rest of the patchset has not changed significantly since v2.
changes from v8:
Document the use of reboot notifier:
it is used to make sure kexec works correctly
changes from v7:
Address Avi's comments:
make bit 1 in the new MSR reserved, require an aligned address
remove unused macros from header
replace __align by BUILD_BUG_ON and a comment
changes from v6:
Address Marcelo's comments:
marcelo's comments for isr optimization: isr_cache -> highest_*
marcelo's comments for host side eoi: rename isr_cache->highest_*
kvm eoi msr doc: fix typo pointed out by marcelo
isr optimization: add comment to address marcelo's request
kvm: don't make lapic attention check unlikely. at marcelo's request
eoi host side: remove unlikely annotations
Changes from v5:
Clear PV EOI when we cancel interrupts.
Pointed out by Gleb.
Always set ISR cache when we inject an interrupt.
Suggested by Ronen Hod.
Changes from v4:
Turn off PV EOI on each exit. Turn it back on when safe.
Suggested by Avi.
Address bug with nested interrupts pointed out by Marcelo.
Changes from v3:
Address review comments by Marcelo:
Multiple cosmetic changes eoi -> pv_eoi
Added multiple comments
Changes from v2:
Kill guest with GP on an illegal MSR value
Changes from v1:
Add host side patch to series
Remove kvm-specific __test_and_clear_bit, document
that x86 one does what we want already
Clear msr on cpu unplug
Michael S. Tsirkin (8):
kvm: document lapic regs field
kvm: optimize ISR lookups
kvm_para: guest side for eoi avoidance
x86/bitops: note on __test_and_clear_bit atomicity
kvm: eoi msi documentation
kvm: only sync when attention bits set
kvm: rearrange injection cancelling code
kvm: host side for eoi optimization
Documentation/virtual/kvm/msr.txt | 34 +++++++
arch/x86/include/asm/bitops.h | 7 ++
arch/x86/include/asm/kvm_host.h | 12 +++
arch/x86/include/asm/kvm_para.h | 7 ++
arch/x86/kernel/kvm.c | 57 ++++++++++-
arch/x86/kvm/cpuid.c | 1 +
arch/x86/kvm/lapic.c | 194 +++++++++++++++++++++++++++++++++++-
arch/x86/kvm/lapic.h | 11 ++
arch/x86/kvm/trace.h | 34 +++++++
arch/x86/kvm/x86.c | 20 +++-
10 files changed, 363 insertions(+), 14 deletions(-)
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