Race-to-idle was introduced by Intel. Intel has a high-leakage process and agressive sitch off of components in idle, making race-to-idle a good strategy for Intel hardware.
That is also why Intel needs the deeper sleep states as compared to (at least older SOI) AMD chips.
I think it needs to be figured out on a per-device basis. It is dependent on chip architecture (what gets switched off when) and on process/manufacture (how much leakage is there at the lowest voltage levels).
Also important: how often does one witch on and off, and how much power does that take. Emptying a cache to memory is not free.