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Validating Memory Barriers and Atomic InstructionsValidating Memory Barriers and Atomic InstructionsPosted Dec 15, 2011 13:49 UTC (Thu) by renox (subscriber, #23785)Parent article: Validating Memory Barriers and Atomic Instructions
>and yes, academics consider x86 to be a weak-memory system
Uhm, and how the Alpha is considered: ultra-weak?
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Is Alpha considered ultra-weak? Posted Dec 16, 2011 17:31 UTC (Fri) by PaulMcKenney (subscriber, #9624) [Link]
Heh! From what I can see, many academics consider even ARM and PowerPC to be ultra-weak. Then again, many such academics have never heard of RCU, so they would likely put Alpha into the same bucket as ARM and PowerPC. :-)
Is Alpha considered ultra-weak? Posted Dec 22, 2011 17:44 UTC (Thu) by mfedyk (guest, #55303) [Link]
What about MIPS? My understanding is that it is a very weak memory architecture. How does it compare?
Is MIPS considered? Posted Dec 22, 2011 18:31 UTC (Thu) by PaulMcKenney (subscriber, #9624) [Link]
I have yet to see a definition of the MIPS memory-ordering model, but I do hope to at some point. Until then, I have no idea, but MIPS is rumored to have a weak memory model similar to ARM and PowerPC.
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