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Hardware face recognitionHardware face recognitionPosted Dec 1, 2011 9:22 UTC (Thu) by Fowl (subscriber, #65667)Parent article: Hardware face detection I suppose "hardware" really means "software running somewhere else". I wonder if this somewhere else is programmable. If it is I wonder what else it could do, how it could be abstracted, as maybe another NUMA node? as a "GPGPU" type device? Does the kernel support swapping threads between architectures? It's an interesting problem. At the very least getting a common software layer above "special features".
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Hardware face recognition Posted Dec 1, 2011 11:03 UTC (Thu) by dlang (✭ supporter ✭, #313) [Link]
I believe that NUMA nodes are all expected to be the same architecture.
This also sounds to me more like a CPU with additional commands than software that happens to run on another CPU (although with microcode, all CPU commands are 'just software running on another CPU'), think of it more like the features that some CPUs have to generate random numbers, or better yet, to do AES encryption in 'hardware', you create a memory area containing the info you want the command to run on, fill it with 'interesting' data, invoke the CPU command, and get back a large chunk of 'useful' data.
Hardware face recognition Posted Dec 1, 2011 13:46 UTC (Thu) by GhePeU (subscriber, #56133) [Link]
This came up a few months ago, when the c6x and Hexagon architectures were merged (https://lwn.net/Articles/457635/). I don't know if that virtio-based framework is being worked on.
Hardware face recognition Posted Dec 1, 2011 21:15 UTC (Thu) by linusw (subscriber, #40300) [Link]
If this is just an offload core as in "AMP node" it'd be eligible to use Ohad Ben Cohens RPMesg for it as described elsewhere:
http://lwn.net/Articles/464391/
That requires a firmware which can be patched to talk that very protocol or more generally just that you can alter the stuff on the other side as you like.
However this is probably not the case, this seems to be autonomous silicon, judging from the very specific register map, and the note from other developers that it's also deployed in other silicon.
Hardware face recognition Posted Dec 1, 2011 22:09 UTC (Thu) by iabervon (subscriber, #722) [Link]
A lot of the "software running somewhere else" things these days are running on FPGAs, or as ASICs designed as software but compiled to chip designs. Even in the case where it is some sort of microcontroller, it's reasonably likely not to be able to run code except from flash, making it impractical to schedule threads to, even if it is the same architecture as the nominal CPU. Even when it's programmable, it's probably best to model as a hotpluggable bus, where you can cause a device with a particular function to appear by loading its firmware, simply because it causes wear and takes significant time to reprogram it.
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