Parallel Input Output Controller (PIO)
Posted Nov 24, 2011 14:43 UTC (Thu) by linusw
In reply to: Parallel Input Output Controller (PIO)
Parent article: The pin control subsystem
So the bit I wanted to stress in this post is that gpio lines in the same controller bank (i.e. 32 lines) can be used as a parallel bus. In the hardware I use PC16-PC31 are used as the top 16 bits of the data bus. Now not many users should be fiddling with the data bus but there are other uses of the parallel nature of some gpio lines.
Actually pin control is partitioned apart from users of the pins, say GPIO or I2C or SPI, it just does pin control. As for gpiolib, it's designed to only handle single-bit GPIOs. I think a new MMIO-port abstraction is needed to handle a register range as a memory-mapped parallel port of some kind, if one does not already exist, I haven't seen one.
to post comments)