The problem with prefetch
Posted May 24, 2011 23:48 UTC (Tue) by
pphaneuf (guest, #23480)
In reply to:
The problem with prefetch by Cyberax
Parent article:
The problem with prefetch
The NEC SX-4 had 16 gigabytes of SRAM as its main memory. It didn't really have any CPU cache (only something like 32KB of instruction cache). That was a nice way of not having to deal with cache coherence issues in an SMP system.
It also had a 256 bytes wide memory bus (compared to the typical 64 bits).
Serious hardware, that. :-)
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