Glibc change exposing bugs - a bug in proposed memcpy
Posted Nov 16, 2010 16:45 UTC (Tue) by
promotion-account (guest, #70778)
In reply to:
Glibc change exposing bugs by MisterIO
Parent article:
Glibc change exposing bugs
Look at the one proposed by Linus:
void *memcpy(void *dst, const void *src, size_t size)
{
void *orig = dst;
asm volatile("rep ; movsq"
:"=D" (dst), "=S" (src)
:"0" (dst), "1" (src), "c" (size >> 3)
:"memory");
asm volatile("rep ; movsb"
:"=D" (dst), "=S" (src)
:"0" (dst), "1" (src), "c" (size & 7)
:"memory");
return orig;
}
For completeness, this should have an "rcx" clobber, or GCC may believe that this important register will not change after each assembly snippet. Such a bug may get triggered if GCC aggressively inlined the code, which occurs in a good number of cases given its optimizer competency.
--Darwish
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