Posted Jul 15, 2010 18:14 UTC (Thu) by klossner (subscriber, #30046)
In reply to: Linux on PowerPC by Yorick
Parent article: Linux on PowerPC
There's no mode bit in the hardware. The 32-bit ISA is just a subset of the 64-bit. Code that restricts itself to the 32-bit ISA can access only the low 32 bits of the integer registers.
The conflict is between the two ABIs. An object file compiled to use the 32-bit ABI will not inter-operate with one for the 64-bit ABI because, for example, it passes 64-bit function arguments in two registers instead of one.
Posted Jul 15, 2010 18:52 UTC (Thu) by Yorick (subscriber, #19241)
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There's no mode bit in the hardware.
Yes there is (MSR[SF]). It mainly masks the upper 32 bits of the effective address, but also affects certain overflow and carry calculations.
The 32-bit ISA is just a subset of the 64-bit. Code that restricts itself to the 32-bit ISA can access only the low 32 bits of the integer registers.
That is correct, in that the 32-bit subset cannot "see" the upper bits, but it can change them. And, of course, a process in 32-bit mode can use the full 64-bit instruction set.
Linux on PowerPC
Posted Jul 19, 2010 17:31 UTC (Mon) by jengelh (subscriber, #33263)
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>That is correct, in that the 32-bit subset cannot "see" the upper bits, but it can change them. And, of course, a process in 32-bit mode can use the full 64-bit instruction set.
On RISCs perhaps (SPARC: ldx), but unlikely on x86, or how would you invoke movq rax, rbx from an ELF32 on Linux?
Linux on PowerPC
Posted Jul 20, 2010 22:26 UTC (Tue) by Yorick (subscriber, #19241)
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On RISCs perhaps (SPARC: ldx), but unlikely on x86, or how would you invoke movq rax, rbx from an ELF32 on Linux?