|| ||Andi Kleen <email@example.com>|
|| ||firstname.lastname@example.org, email@example.com, firstname.lastname@example.org,
|| ||[PATCH] [0/9] x86: CMCI: Add support for Intel CMCI |
|| ||Thu, 12 Feb 2009 13:49:29 +0100 (CET)|
|| ||Article, Thread
Intel CMCI (Corrected Machine Check Interrupt) is a new
feature on Nehalem CPUs. It allows the CPU to trigger
interrupts on corrected machine check events, which allows faster
reaction to them instead of with the traditional
This is similar to the existing AMD threshold interrupt
feature. I'm reusing some code from this.
In addition it also provides for better handling of machine
check banks shared between CPUs. This is pretty common
on Nehalem class systems, where threads and cores share
some banks with each other.
The series applies on top of the earlier bugfixes
and cleanups series.
Aimed for 2.6.30. Tested on 2.6.29-rc4, but also
applies to x86 tip as of today.
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