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MyHDL 0.6 released
Version 0.6 of MyHDL
has been announced.
"MyHDL is an open source Python package that lets you go from Python to silicon. With MyHDL, you can use Python as a hardware description and verification language. Furthermore, you can convert implementation-oriented MyHDL code to Verilog and VHDL automatically, and take it to a silicon implementation from there." See the
What's New
document for release details.
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