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ARM SoC launched with Linux support (Linux Devices)ARM SoC launched with Linux support (Linux Devices)Posted Jan 9, 2009 19:03 UTC (Fri) by ncm (subscriber, #165)In reply to: ARM SoC launched with Linux support (Linux Devices) by robert_s Parent article: ARM SoC launched with Linux support (Linux Devices)
Well, yes, it's easy to emulate one with the other, but what matters is, what is not too inefficient to implement on a die shared with dozens of other processors?
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ARM SoC launched with Linux support (Linux Devices) Posted Jan 10, 2009 13:22 UTC (Sat) by alonz (subscriber, #815) [Link] Well, in practice, LL/SC is quite easy to implement—it is almost a natural extension of the MESI protocol used for synchronizing the L1 caches in a multiprocessor chip.IIRC, "load-locked" ensures the line is in the cache; "store-conditional" simply tests the line is currently not in "Invalid" state (i.e., it has not been written by another processor).
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