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ATS capability support for Intel IOMMU

From:  Yu Zhao <yu.zhao@intel.com>
To:  jbarnes@virtuousgeek.org, dwmw2@infradead.org
Subject:  [PATCH 0/6] ATS capability support for Intel IOMMU
Date:  Wed, 7 Jan 2009 22:47:16 +0800
Message-ID:  <20090107144716.GA4697@yzhao12-linux.sh.intel.com>
Cc:  linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Archive-link:  Article, Thread

This patch series implements Address Translation Service support for
the Intel IOMMU. ATS provides ability for the PCI Endpoint to request
the DMA address translation from the IOMMU and cache the translation
in the Endpoint to alleviate IOMMU pressure and improve the hardware
performance in the I/O virtualization environment.

[PATCH 1/6] PCI: support the ATS capability
[PATCH 2/6] VT-d: parse ATSR in DMA Remapping Reporting Structure
[PATCH 3/6] VT-d: add queue invalidation fault status support
[PATCH 4/6] VT-d: add device IOTLB invalidation support
[PATCH 5/6] VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
[PATCH 6/6] VT-d: support the device IOTLB
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