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Opteron launchesOpteron launchesPosted Apr 24, 2003 17:18 UTC (Thu) by JoeBuck (subscriber, #2330)In reply to: Opteron launches by leandro Parent article: Opteron launches
The inefficiency caused by the need to translate to internal RISC operations matters less and less as time goes on. Most of the area of modern processors is on-chip cache, and with a denser instruction decoding you need less cache.
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Opteron launches Posted Apr 30, 2003 5:32 UTC (Wed) by emkey (guest, #144) [Link] Besides, I've played around a little bit with a dual Itanium2 and a quad Opteron and the Opteron system generated FAR less heat then the dual itanium2. Plus the Opteron system was roughly the same size.I'm not a CPU expert by any stretch of the imagination but I believe VLIW CPU's such as the itanium have an analog to the decoding that goes on in the X86 based CPU's. The Opteron has the potential to do some serious damage to Intel and to be a huge boost for Linux. I have my fingers crossed that AMD doesn't screw this whole deal up...
Opteron launches Posted Aug 7, 2003 21:38 UTC (Thu) by leandro (subscriber, #1460) [Link] > the Opteron system generated FAR less heat then the dual itanium2. Plus the Opteron system was roughly the same size. Good for them. But a RISC system in the same process would be even faster with less heat, and be smaller too. > I believe VLIW CPU's such as the itanium have an analog to the decoding that goes on in the X86 based CPU's. Actually IPF is not VLIW, but a strange contraption called EPIC. VLIW would be a RISC carried to the extreme, which isn't quite viable for binary, general-purpose computing.
Opteron launches Posted Aug 7, 2003 21:42 UTC (Thu) by leandro (subscriber, #1460) [Link] > The inefficiency caused by the need to translate to internal RISC operations matters less and less as time goes on. It still matters enough that the ARM and the POWER are more efficient designs. Ever saw an x86 high-performance embedded system?
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