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x86: PAT support updated - v3

From:  venkatesh.pallipadi@intel.com
To:  ak@muc.de, ebiederm@xmission.com, rdreier@cisco.com, torvalds@linux-foundation.org, gregkh@suse.de, airlied@skynet.ie, davej@redhat.com, mingo@elte.hu, tglx@linutronix.de, hpa@zytor.co
Subject:  [patch 00/13] x86: PAT support updated - v3
Date:  Tue, 18 Mar 2008 17:00:12 -0700
Message-ID:  <20080319000012.439150000@intel.com>
Cc:  linux-kernel@vger.kernel.org
Archive-link:  Article, Thread


Follow up on earlier PAT patch series here:
http://lkml.org/lkml/2008/1/10/312

This patch series adds Page Attribute Table (PAT) support on x86. There have
been few changes based on comments for earlier patches and also issues that
was seen while the earlier patchset was in mm. The main changes include:

* Unlike earlier patchset, there are no changes to identity mapping of
  reserved regions.
* Unlike earlier patches, there are no chanegs to early ioremap.
* We look at MTRR setting and PAT request and track the resultant type
  to avoid aliasing.
* UC_MINUS in PAT to provide backward compatibility to /dem/mem mmap users.

In general, we have tried to make patches more simpler and cleaner. Hope is
to cause less disruption along the way. The changes/cleaups that went into
x86/mm (specifically pageattr.c) has helped us along the way.

The patchset is against x86 testing from couple of days back.

The last patch in the series is meant for test-tree only and adds some useful
printks that can help us debug any potential issues.

There are two issues that we are leaving out at the moment to make the patch
simple. We will be addressing them with incremental patches soon:
* FB/DRM drivers using pgprot_val and changing protection on their own
  without using any proper APIs like ioremap. There are few such usages and
  each one will be addressed separately.
* To change attributes from WC to WB in a "perfect way", one has to follow
  certain sequence like make page non-present etc.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>

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