Memory part 2: CPU caches
Posted Oct 2, 2007 6:29 UTC (Tue) by phip
Parent article: Memory part 2: CPU caches
Shouldn't the muxes in figure 3.7 be between the ram arrays and the comparitors (similar to figure 3.6, with one mux for each comparitor) instead of along the top of the ram arrays?
Thanks for another interesting article.
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