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Covered 20060530 is out

Release 20060530 of Covered, a Verilog code coverage analysis utility, has been announced. Here are the changes: "Contains FSM state/arc coverage info in GUI. Contains assertion coverage info in GUI and ASCII output files. Contains GUI syntax highlighter. Allows multiple files to be merged with a single call to the merge command. Lots of bug fixes/enhancements/documentation updates."
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